The present disclosure relates to semiconductor circuits, and particularly to a semiconductor circuit including a non-volatile memory and a sensing circuit providing an adaptive reference for sensing, and a method of operating the same.
Non-volatile memory technologies have the potential to provide high-density memory devices in future generations. Non-volatile memory devices provide low cost per bit, permanency (non-volatility) of stored information, and reasonably long lifetime (endurance) as measured by the number of writing cycles. As used throughout the present disclosure, a memory device refers to a device including at least a plurality of memory cells capable of storing one bit of information. As used throughout the present disclosure, “endurance” refers to the average number of write cycles that a non-volatile memory device can provide before a device failure. As used throughout the present disclosure, a “cycling” of a memory cell refers to the event of writing information for a single memory bit on the memory cell. Exemplary non-volatile memory devices include spin torque transfer random access memory (RAM) devices, phase change memory (PCM) devices, and resistive random access memory (RAM) devices.
Non-volatile memories do not provide as high a level of endurance as static random access memory (SRAM) or dynamic random access memory (DRAM) due to the inherent nature of the information storage mechanism. Specifically, the cell state change in a non-volatile memory device requires a change in the resistivity of a material or other physically measurable quantities. In order to utilize non-volatile memory devices in upper hierarchy of memories, e.g., in direct communication with a processor unit as a first level cache or in close communication with the processor unit as a second level or third level cache, the endurance of non-volatile memory technologies needs to be improved beyond the level achieved in present day technology.